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Second-Term Examination

Fifth Semester [B.Tech] - November  2006

Paper Code : ETEC – 301 Subject : DCS-II

Time : 11/2 Hours

Maximum Marks : 30

Note : Attempt any 3 questions in all. Q1 is compulsory. Each question carries 10 marks.

Q1

( a )

What do you mean by delta delay?

1

( b )

What are generics? Give examples. 2
( c ) Differentiate between constants and variables? 2
( d ) Write down a signal assignment statement (using the concatenation operator &) that creates a rotate right operation by 7 bit positions on the following signal:
SIGNAL m : std_logic_vector(12 downto 0);
2
( e ) What is the main function performed by OLMC's? 3

Q2

( a )

What are signal drivers? What is the effect of transport delay and inertial delay on the signal drivers?

6

( b )

What are the types of object declarations used in VHDL?

4

Q3

( a )

Given the following entity declaration of a 2-to-4 decoder with an enable signal

ENTITY decoder IS
              PORT(a, b, g: IN std_logic;
                          y: OUT std_logic_vector(3 DOWNTO 0));
END decoder;

Write down two architecture descriptions using

  1. a selected signal assignment
  2. a conditional signal assignment
4

( b )

What is the general expression for case statement? 2
( c ) Implement BCD to gray code converter using PLA? 4

Q4

Write short notes on :

10

( a )

DRAM interfacing

( b )

Sequential PLD's

( c )

Configuration specification

( d ) VHDL simulation phases  

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