Q3
( a )
3
( b )
- Obtain the primitive flow table and show that it can be
reduced to the following flow table:
00 01 11 10 A A,0 A,1 B,- A,1 B A,- B,0 B,0 B,0 - Design the circuit using SR latches.
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Fifth Semester [B.Tech] - September 2005
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Paper Code : ETEC – 301 Subject : Digital Circuit and Systems I |
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Time : 11/2 Hours |
Maximum Marks : 30 |
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Note : Attempt any 3 questions in all. Q1 is compulsory. Each question carries 10 marks. |
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Q1 |
( a ) |
How are hazards avoided using SR latches. |
2 |
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( b ) |
Distinguish between Mealy model and Moore model. | 1 | |||||||||||||||||||||||||
| ( c ) |
A sequential circuit has two JK flip flops A and B, on input y, and
one output y. The J and K inputs are defined as: Ja = B, Kz = B',
Jb = Kb = (xA' + x'A)' Derive the state table. |
3 | |||||||||||||||||||||||||
| ( d ) | What are cycles in asynchronous circuits. Give examples. | 2 | |||||||||||||||||||||||||
| ( e ) |
Assign output values to the dont care conditions in the following
flow tale:
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2 |
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Q2 |
( a ) |
A sequential network has one input (X) and one output (Z). The network examines groups of four consecutive inputs and produces an output Z=1 if the input sequence 0101 or 1001 occurs. The network resets after every four inputs. Determine the mealy state graph and state table. |
6 |
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( b ) |
Draw an ASM chart that specifies a conditional operator to increment register R during state T1 and transfer to state T2 if control inputs z and y are equal to 1 and 0 respectively. |
4 |
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Q3 |
( a ) |
Determine the state table corresponding to the following state
diagram:
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3 |
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( b ) |
Design an asynchronous sequential circuit with two inputs x1 and x2
and one output z. initially both inputs and outputs are equal to 0.
When x1 or x2 becomes 1, z becomes 1. When the second input also
becomes 1, the output becomes 0. The output stays at 0 until the
circuit foes back to the initial state.
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Q4 |
( a ) |
USE IMPLICATION TABLE TO REDUCE THE FOLLOWING TABLE TO A MINIMUM
NUMBER OF STATES:
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3 |
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( b ) |
The state diagram of a control unit is as shown below. It has four
states and two inputs x and y.
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7 | ||||||||||||||||||||||||||||||||||||||||
